The Engineering Core

800V to 6V Converter Explained: The 128:1 GaN LLC Math Behind Navitas and Microchip's 20 kW Rack Board

 


At 6 volts, 20 kilowatts is 3,333 amps. Every tenth of a milliohm in the path burns about 1.1 kW. That single number is why the industry is trying to jump from 800 V to 6 V in one step, right next to the GPU.

Navitas and Microchip have published a 20 kW reference design that converts an 800 VDC rack bus directly to a 6 V server rail, skipping the usual 50 V intermediate stop. It is headed to the OCP Global Summit in San Jose (October 12–15). Below: what was announced, how a 128:1 resonant converter actually works, and which numbers you should and should not trust yet.

What was announced

According to DataCentral's write-up of Microchip's documentation and Power Electronics News, the platform is:

  • Two 10 kW modules wired input-series, output-parallel (ISOP), using a 128:1 full-bridge LLC topology.
  • A target efficiency of 96% at roughly 1 MHz switching, with a stated power density of 2,100 W/in³.
  • A board of 400 × 60 × 6 mm, using planar transformers and single-side liquid cooling. PE News says it's about 20% thinner than a mobile phone.
  • 16 Navitas NV6034 GaN FETs on the primary side (650 V, 17 mΩ, 8 × 8 mm dual-side-cooled DFN).
  • A Microchip dsPIC33AK256MPS306 controller running the resonant loop, telemetry, thermal protection, PMBus/SPDM communication and live firmware updates, plus a TA100 secure element for secure boot and authenticated updates.

One caution DataCentral flags explicitly: Navitas earlier showed a separate standalone 800 V-to-6 V board with a 97.5% peak target. That figure belongs to a different board. For this joint design, the number is 96%.

Engineering point 1: the current math that forces the architecture

Power is voltage times current, so the same 20 kW looks completely different on each side of the board:

  • Input side: 20 kW ÷ 0.96 ÷ 800 V ≈ 26 A.
  • Output side: 20 kW ÷ 6 V ≈ 3,333 A.

Conduction loss scales with I²R. Put a 0.1 mΩ connection in each path. On the 800 V side that costs about 0.07 W. On the 6 V side it costs 3,333² × 0.0001 ≈ 1,111 W. That's a ratio of more than 15,000 to 1, for the same piece of copper. (These are my illustrative resistance values, not figures from the design.)

That is the whole argument in one line: keep the voltage high for as long as possible, and do the final step-down physically on top of the load. A 6 mm-thin board that can sit next to the GPU board is not a styling choice. It's how you avoid shipping thousands of amps across a rack.

Key takeaway

At 800 V a 20 kW load draws about 26 A. At 6 V it draws about 3,333 A. Losses scale with current squared, so the low-voltage conversion has to happen as close to the processor as physically possible. Single-stage 800 V-to-6 V conversion is the shortest route there.

Engineering point 2: how a 128:1 LLC gets there

An LLC converter drives a resonant tank (a series inductor, a capacitor, and the transformer's magnetizing inductance) near its resonant frequency. Near resonance, its gain is set mainly by the transformer turns ratio, so it behaves like a nearly fixed-ratio "DC transformer." That's why these converters are usually quoted as a ratio rather than as a regulated output. The stated 128:1 lines up with the overall voltage ratio: 800 V ÷ 128 = 6.25 V, just above a 6 V rail.

The ISOP wiring is the clever part. With the two modules' inputs in series, each one sees roughly 400 V instead of 800 V. That keeps a 650 V GaN FET at about 62% of its rated voltage, leaving margin for ringing and transients. Paralleling the outputs then adds the two 10 kW modules' currents together at 6 V.

The price of ISOP is that the two input voltages must stay balanced. If one module takes more of the load, its input capacitor droops and the other module's FETs see more than half the bus. Keeping that sharing stable is a control-loop job, and it's one reason a 200 MHz DSC sits in the middle of this design rather than an analog controller. (This is my engineering reading of ISOP in general. The exact balancing scheme isn't described in the coverage I found.)

Engineering point 3: why 1 MHz and GaN go together

A transformer must support a certain volt-seconds per half cycle without saturating its core. Raise the switching frequency and each half cycle gets shorter, so the core area times the number of turns can shrink roughly in proportion. Going from about 100 kHz to 1 MHz is what makes flat planar transformers, with windings etched into PCB layers, realistic at 10 kW.

The catch is switching loss, which grows with frequency. An LLC helps because, when tuned correctly, the primary FETs turn on at zero voltage (ZVS). GaN helps because its low output charge lets that zero-voltage transition finish within a very short dead time. Dual-side-cooled packages then pull heat out of both faces of each device into the liquid-cooled plate.

A quick sanity check on the density claim: 40 × 6 × 0.6 cm = 144 cm³, or about 8.8 in³. 20 kW across that is roughly 2,280 W/in³, in the same range as the stated 2,100 W/in³. The small gap probably comes down to what volume is counted. That's my inference, not theirs.

Engineering point 4: the power supply is now a networked computer

The less obvious part of this design is security. The controller speaks PMBus and SPDM and accepts live firmware updates, so a corrupted or unauthorized image could take down a healthy power stage. The TA100 gives the controller a hardware root of trust for secure boot and signed updates. As DataCentral notes, that protects the power controller, not the whole rack. Still, for anyone who has debugged field equipment, "firmware integrity" belongs in the availability analysis just like capacitor aging does.

To verify

  • Whether "20 kW" is input or output power, and the load point where 96% is measured. The full-load vs partial-load curve isn't public in the coverage I found.
  • How 128:1 maps to the actual per-module transformer turns ratio and secondary rectifier arrangement under ISOP.
  • Transient response numbers for GPU load steps, and the hold-up and protection behavior on an 800 V bus fault.
  • This is a reference design, not a qualified production PSU. Adoption by rack or power-shelf makers is the milestone to watch.

What to take away

  • Judge single-stage vs two-stage on the same load points. As an example, a hypothetical 98% 800-to-50 V stage times a 97.5% 50-to-6 V stage gives about 95.6%. A single 96% stage only wins if it holds that efficiency where GPUs actually run, which is often at partial load. (Those stage efficiencies are illustrative, not vendor data.)
  • The real enemy is distance at low voltage. Count milliohms on the 6 V side before you count tenths of a percent of converter efficiency.
  • ISOP trades device stress for control complexity. Ask how input sharing is guaranteed during startup, faults and module failure.
  • Treat power firmware like any other attack surface. Secure boot and signed updates are becoming part of the PSU spec.

Further reading and watching

Figures are as reported by the cited sources as of October 11, 2026. Calculations marked as illustrative are the author's own and are not vendor data.